The present invention relates to a semiconductor memory device and, more particularly, to the technique effectively utilizable for an EEPROM (electrically erasable and programmable read-only memory) employing, for example, non-volatile memory elements such as MNOS (metal nitride oxide semiconductor) transistors.
Conventional EEPROMs such as "HN58064" or "HN58C65" (made and sold by Hitachi, Ltd.) are internally equipped with a bootstrap circuit to generate a high voltage for writing and erasing operations. In this case, the writing or erasing operation is performed through switchover by the selective application of such high voltage either to the gate electrode of the MNOS transistor or to a well region where the MNOS transistor is formed.
One example of such EEPROM is disclosed in Japanese Patent Laid-open No. 55 (1980)-156370.